1. Field
Aspects of embodiments of the present invention relate to power electronics, more specifically power electronics having high power factor and low standby power consumption.
2. Related Art
One comparative design of a single-ended flyback converter circuit cannot achieve power factor greater than 0.7. Another comparative design includes active power factor correction (APFC) and a single-stage or a double-stage single-ended flyback converter circuit, but this circuit also has limitations and may be unable to meet energy efficiency standards such as no-load power consumption of less than 0.1 W. Therefore, comparative circuit designs may not be able to meet various power consumption design requirements imposed by current standards (e.g., California Energy Commission standards for efficiency of portable luminaries and U.S. Department of Energy (DOE) Level VI standards).